The semiconductor industry has underpinned dramatic changes in the way we live, from
healthcare to travel and recreation. This pervasive effect has been driven by continuous
improvements in drivers such as speed, power and memory capacity. The scale and
sophistication of modern devices means that the only practical way in which large devices can
be designed is by breaking the design down into ‘building blocks’ known as standard cells,
and to then connect these blocks together to make a complete device. However, as the
transistors that make up these building blocks consist of only a few atoms, the placement of
individual atoms can have an unpredictable effect on device characteristics (a problem known
as intrinsic variability), and current design approaches cannot manage this variability as
devices get smaller. The problem is even more widespread when dealing with memory cells
(such as SRAM cells ) where failure rates are higher
Worldwide, no company offers a tool capable of addressing transistor variability during
design. Coping with intrinsic variability has been identified as one of the major challenges
facing the industry; semiconductor companies acknowledge a major problem with transistor
variability at the 22nm node and beyond.
ngenics has developed the MOTIVATED technology, which can address these issues, and
would therefore revolutionise the semiconductor industry. It now needs to move from a
successful feasibility study to a proof of concept technology through the production of one or
more industrial standard demonstrators
The aim of this project is to develop an automated cell design process that incorporates
variability for selected test cases using a 14nm finFET state-of-the-art process. The
development of test case designs, optimised for variability, would demonstrate the impact of
ngenics’ offering and provide a crucial proof of concept. This will allow ngenics to develop
credibility and expand the offering to address other pertinent challenges
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